Işıl Öz
Assistant Professor

Işıl Öz received the B.Sc. and M.Sc. degrees in computer engineering from Marmara University. She received the Ph.D. degree in computer engineering at Bogazici University. After completing her Ph.D. studies, she worked as a postdoctoral researcher, ERCIM/Marie Curie Fellow, at Swedish Institute of Computer Science (SICS). She joined IZTECH Computer Engineering Department in 2018. Her research interests include computer architecture, performance and reliability of multi-core systems, and fault-tolerant computing.

 

  • B.Sc. : Computer Engineering, Marmara University (2004)
  • M.Sc. : Computer Engineering, Marmara University (2008)
  • Ph.D. : Computer Engineering, Boğaziçi University (2013)

2021

Işıl Öz; Sanem Arslan

Predicting the soft error vulnerability of parallel applications using machine learning Journal Article

International Journal of Parallel Programming, 49 (3), pp. 410–439, 2021.

BibTeX

Dindar Öz; Işıl Öz

Scalable parallel implementation of migrating birds optimization for the multi-objective task allocation problem Journal Article

The Journal of Supercomputing, 77 (3), pp. 2689–2712, 2021.

BibTeX

Ercüment Kaya; Ömer Faruk Karadaş; Işıl Öz

Evaluating Performance and Reliability of Selective Redundant Multithreading for GPGPU Applications Journal Article

2021.

BibTeX

  • FTGPGPU- Hardware Fault Tolerance Analysis for General Purpose Graphics Processing Units (GPGPU) Applications, TÜBİTAK ARDEB 3501
  • B.Sc. : Computer Engineering, Marmara University (2004)
  • M.Sc. : Computer Engineering, Marmara University (2008)
  • Ph.D. : Computer Engineering, Boğaziçi University (2013)

Journal Article

  • Öz, I., Arslan, S., “A Survey on Multithreading Alternatives for Soft Error Fault Tolerance,” ACM Computing Surveys, vol. 52, no.2, April 2019.
  • Öz, I., Bhatti, M.K., Popov, K., Brorsson, M., “Regression-Based Prediction for Task-Based Program Performance,” Journal of Circuits, Systems and Computers, vol.28, no.04, June 2018.
  • Bhatti, M.K.,Öz, I., Amin, S., Mushtaq, M., Farooq, U., Popov, K., Brorsson, M., “Locality-aware task scheduling for homogeneous parallel computing systems,” Computing, vol.100, no.6, pp.557-595, June 2018.
  • Öz, I., “Analyzing Fault Behavior of Shared Data in Parallel Applications,” Microprocessors and Microsystems - Embedded Hardware Design, vol.45, pp.67-80, August 2016.
  • Öz, I., Gil, M., Utreta, G., Matorell, X., “Exploring Memory Error Vulnerability for Parallel Programming Models,” Parallel Processing and Applied Mathematics, PPAM, 2015.
  • Bhatti, M.K., Öz, I., Muddukrishna, A., Popov, K., Brorsson, M., “Noodle: A Heuristic Algorithm for Task Scheduling in MPSoC Architectures,” Euromicro Conference on Digital System Design, DSD, 2014.
  • Öz, I., Topçuoğlu, H.R., Kandemir, M.T., Tosun, O., “Examining Thread Vulnerability analysis using fault-injection,” IFIP/IEEE International Conference on Very Large Scale Integration, VLSI-SoC, 2013.
  • Öz, I., Topçuoğlu, H.R., Ermiş, M., “A Meta-heuristic Based Three-dimensional Path Planning Environment for Unmanned Aerial Vehicles,” Simulation, vol.89, no.8, pp.903-920, 2013.
  • Öz, I., Topçuoğlu, H.R., Kandemir, M.T., Tosun, O., “Performance-reliability tradeoff analysis for multithreaded applications,” Design, Automation & Test in Europe Conference & Exhibition, DATE, 2012.
  • Öz, I., Topçuoğlu, H.R., Kandemir, M.T., Tosun, O., “Thread Vulnerability in Parallel Applications,” Journal of Parallel and Distributed Computing, vol.72, no.10, pp.1171-1185, October 2012.
  • Öz, I., Topçuoğlu, H.R., Kandemir, M.T., Tosun, O., “Reliability-aware Core Partitioning in Chip Multiprocessors,” Journal of Systems Architecture - Embedded Systems Design, vol.58, no.3-4, pp.160-176, March 2012.
  • Öz, I., Topçuoğlu, H.R., Kandemir, M.T., Tosun, O., “Quantifying Thread Vulnerability for Multicore Architectures,” International Euromicro Conference on Parallel, Distributed and Network-based Processing, PDP, 2011.
  • Hasırcıoğlu, I., Topçuoğlu, H.R., Ermiş, M., “3-D path planning for the navigation of unmanned aerial vehicles by using evolutionary algorithms,” Annual Conference on Genetic and evolutionary computation, 2008.

  • FTGPGPU- Hardware Fault Tolerance Analysis for General Purpose Graphics Processing Units (GPGPU) Applications, TÜBİTAK ARDEB 3501